Asada and Ikeda Laboratories
ニュース
University of Tokyo,
School of Engineering,
Dept. of EE and IS,
Computing and Communication System Course
|
日本語
Members
Research
Publications
News
Access
Parit and Tamura received VDEC Design Award Encouragement Prize
01/20/2017
Parit and Tamura received VDEC Design Award Encouragement Prize at
IEEE ASP-DAC
Title
CMOS-on-Quartz Pulse Generator for Low Power Applications
A 15 x 15 SPAD Array Sensor with Breakdown-Pixel-Extraction Architecture for Efficient Data Readout