Ikeda and Iizuka Laboratories | University of Tokyo

University of Tokyo,  School of Engineering,  Dept. of EE and IS,  Computing and Communication System Course

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What's New

11/13/2020Osada's research achievement is published at IEEE SSC-L.
10/05/2020Ojima and Osada received the d.lab-VDEC Design Award
06/17/2020Osada presented his research at VLSI Symposium 2020.
03/23/2020Yamazaki received the Excellent Master's Thesis Award
11/20/2019Takahashi received Student Poster Award
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    • Self-synchronous Circuit
      • Non-pipeline CPU using DCVSL
      • Self-synchronous Moebius Circuits
      • Self-synchronous FPGA
      • MOS Magnetic Sensors
    • Image Sensors
      • Multi Functional 3-D Image Sensors
      • Robust 3-D Image Sensor with Correlative Feeble Lighting
      • High Resolution 3-D Image Sensors
      • Ultra High Speed 3-D Image Sensors
      • Spectroscopic CMOS sensors
    • Signal Integrity
      • Three Wire Data Encoding
      • Digital Active Substrate Noise Canceller
      • Active Method for Resonant Power Supply Noise Reduction
    • Analog Technique
      • Time Difference Amplifiers
      • Time-to-Digital Converters
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      • Clock-Data Recovery Circuit
    • RF
      • Digital RF
    • CAD
      • Design-Specific Cell Library Synthesis
      • SAT-Based Cell Layout Synthesis
      • Standard Cell Yield Optimizatoin
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