A NOVEL DESIGN TECHNIQUE FOR S/H AND A/D、1996年2月、早稲田大学
博士論文
ミクストシグナル処理用CMOS集積回路の実装と応用に関する研究、2003年2月、早稲田大学
論文[1]
Nguyen Ngoc Mai Khanh, Masahiro Sasaki, Kunihiro
Asada, “A 0.18-μm CMOS X-band Shock Wave Generator with an On-Chip Dipole
Antenna and a Digitally Programmable Delay Circuit for Pulse Beam-Formability,”(投稿済み).
論文[2]
Masahiro Sasaki, Makoto Ikeda,
Kunihiro Asada, “−1/+0.8°C Error, Accurate Temperature Sensor using 90nm 1V
CMOS for On-line Thermal Monitoring of VLSI circuits,” IEEE Transactions on
Semiconductor Manufacturing, Vol.21, Issue 2, pp.201−208, May, 2008.
論文[3]
Daigo Muramatsu, Mitsuru Kondo, Masahiro Sasaki,
Satoshi Tachibana, Takashi Matsumoto, “A Markov Chain Monte Carlo Algorithm
for Bayesian Dynamic Signature Verification,” IEEE Transactions on
Information Forensics and Security, Vol. 1, No. 1, pp.22−34, Mar., 2006.
論文[4]
Khayrollah Hadidi, Keita Eguchi, Mitsuyoshi Ito, Masahiro
Sasaki, Hiroyuki Oshima, Abdollah Khoei, “Novel Single-Stage Second-Order
Structure for Low-Pass Wide-Band Low-Power Continuous-Time Filters,”
Elsevier International Journal of Electronics and Communications, Vol.
59, No. 6, pp.362−369, Sep., 2005.
論文[5]
Masahiro Sasaki, Shin
Yokoyama, Takashi Matsumoto, “0.18μm CMOS 6GHz Pseudo Non-overlapping Clock
Generator using High-speed Dividers,” WSEAS Transactions on Circuits and
Systems, Issue 5, Vol. 3, pp.1208−1214, July,
2004.
Masahiro Sasaki, Mai Nozawa,
Takashi Matsumoto, “0.18μm CMOS 2GHz Error-Correcting Encoder,” WSEAS
Transactions on Circuits and Systems, Issue 3, Vol. 3, pp.521−526, May, 2004.
論文[8]
Khayrollah Hadidi, Makoto Morimoto, Keita Futami,
Takeshi Oue, Mitsuyoshi Ito, Masahiro Sasaki, Abdollah Khoei, Takashi
Matsumoto, “Linearity performance comparison of cascode current source and
single-device current source IDPs; analyses, simulations and measurements,”
International Journal of Electronics, Taylor & Francis Journal, Vol. 90,
No. 5, 341−353, 2003.
論文[9]
Masahiro Sasaki, Takeyasu
Sakai, Takashi Matsumoto, “A Low Power Matched Filter for DS-CDMA based on
Analog Signal Processing,” IEICE Transaction Fundamentals, vol. E86-A, No. 4,
pp.752−757, Apr., 2003.
論文[10]
Masahiro Sasaki, Takeyasu
Sakai, Takashi Matsumoto, “Low power Consumption Analog Matched Filter,”
Recent Advances in Circuits, Systems and Signal Processing, WSEAS Press,
pp.31−34, 2002.
論文[11]
Khayrollah Hadidi, ○Masahiro
Sasaki, Tadatoshi Watanabe, Daigo Muramatsu and Takashi Matsumoto, ”A
Highly linear Open-Loop Full CMOS High-speed Sample-and-Hold Stage,” IEICE
Transaction Fundamentals, Vol. E83-A, No.2, pp.261−266, Feb., 2000.
国際会議[1]
Nguyen Ngoc Mai Khanh, Masahiro Sasaki,
Kunihiro Asada, “A Fully Integrated Shock Wave Transmitter with an On-Chip
Dipole Antenna for Pulse Beam-Formability in 0.18-μm CMOS,” (投稿済み).
国際会議[2]
Nguyen Ngoc Mai Khanh, Masahiro Sasaki,
Kunihiro Asada, “Integrated Wideband Dipole Antenna for Pulse
Beam-Formability by using 0.18um CMOS Technology,” Asia-Pacific Microwave
Conference (APMC), Dec., 2010 (採択).
国際会議[3]
Masahiro Sasaki, Nguyen Ngoc
Mai Khanh, Kunihiro Asada, “A Circuit for On-chip Skew Adjustment with Jitter
and Setup Time Measurement,” IEEE Asian Solid-State Circuits Conference (A-SSCC),
Nov., 2010 (採択).
国際会議[4]
Nguyen Ngoc Mai Khanh, Masahiro Sasaki,
Kunihiro Asada, “A 0.25-μm Si-Ge Millimeter-wave Damping Pulse Transmitter
Chip with On-chip Loop Antenna Array,” 35th International Conference on
Infrared, Millimeter and THz Waves (IRMMW-THz), Sep., 2010 (採択).
国際会議[5]
Nguyen Ngoc Mai Khanh, Masahiro Sasaki,
Kunihiro Asada, Taihei Monma, “A 0.18-μm CMOS Shock Wave Generator with an
On-chip Antenna and a Digitally Programmable Delay Circuit,” Second Asia
Symposium on Quality Electronic Design (ASQED), pp. 1−4, Penang, Malaysia,
Aug., 2010.
国際会議[6]
Nguyen Ngoc Mai Khanh, Masahiro Sasaki,
Kunihiro Asada, “A 0.18μm CMOS Integrated Antenna Array with Pulse
Beam-formability for Active Imaging Applications,” Solid-State Systems Symposium
(4S), Ho Chi Minh, Vietnam, June, 2010.
国際会議[7]
Nguyen Ngoc Mai Khanh, Masahiro Sasaki,
Kunihiro Asada, “A CMOS Pulse Beamforming Transmitter Design with an On-Chip
Antenna Array for Millimeter Wave Imaging Applications,” 5th International
Conference on Future Information Technology (FutureTech), pp. 1−6, Busan,
Korea, May, 2010 .
国際会議[8]
Tetsuya Iizuka, Daisuke Nakamura, Hiroaki Yoshida,
Satoshi Komatsu, Masahiro Sasaki, Makoto Ikeda, Kunihiro Asada,
“An SoC Platform with On-Chip Web Interface for In-Field Monitoring,”
International SoC Design Conference (ISOCC), pp. 208−211, Busan, Korea, Nov.,
2009.
国際会議[9]
Masahiro Sasaki, Makoto Ikeda,
Kunihiro Asada, “3.5-Gb/s extended frequency range wave-pipeline PRBS
Generator in 0.18-μm CMOS,” 14th IEEE International Conference on
Electronics, Circuits, and Systems (ICECS), pp. 526−529, Marrakesh, Morocco, Dec., 2007.
国際会議[10]
Masahiro Sasaki, Takuro Inoue,
Makoto Ikeda, Kunihiro Asada, “40 frames/sec 16×16 Temperature Probe Array
using 90nm 1V CMOS for On-line Thermal Monitoring on VLSI chip,” IEEE Asian
Solid-State Circuits Conference (A-SSCC), pp. 264−267, Jeju, Korea, Nov., 2007.
国際会議[11]
Masahiro Sasaki, Makoto Ikeda,
Kunihiro Asada, “4-Gb/s low-power PRBS Generator with wave-pipeline technique
in 0.18-μm CMOS,” Proceedings of the 13th IEEE International Conference on
Electronics, Circuits, and Systems (ICECS), pp. 1007−1010, Nice, France, Dec., 2006.
国際会議[12]
Masahiro Sasaki, Makoto Ikeda,
Kunihiro Asada, “−1/+0.8°C Error, Accurate Temperature Sensor using 90nm 1V
CMOS for On-line Thermal Monitoring of VLSI circuits,” Proceedings of the
2006 IEEE International Conference on Microelectronics Test Structures
(ICMTS), pp. 9−12, Austin, TX, USA, Mar., 2006.
国際会議[13]
Masahiro Sasaki, Shin
Yokoyama, Takashi Matsumoto, “0.18μm CMOS 6GHz Pseudo Non-overlapping Clock
Generator using High-speed Dividers,” Proceedings of 8th WSEAS International
Conference on CIRCUITS, Vouliagmeni, Greece, July, 2004.
国際会議[14]
Masahiro Sasaki, Yu Ono,
Takashi Matsumoto, “A wired CDMA interface system,” Proceedings of 8th WSEAS
International Conference on CIRCUITS, Vouliagmeni, Greece, July, 2004.
国際会議[15]
Masahiro Sasaki, Mai Nozawa,
Takashi Matsumoto, “0.18μm CMOS 2GHz Error-Correcting Encoder,” Proceedings
of 4th WSEAS Int. Conf. on INSTRUMENTATION, MEASUREMENT, CONTROL, CIRCUITS
and SYSTEMS, Miami, Florida, Apr., 2004.
国際会議[16]
(招待講演)
Daisuke Sakamoto, Mitsuru Kondo, Hikaru Morita,
Daigo Muramatsu, Masahiro Sasaki, Takashi Matsumoto, “DYNAMIC
BIOMETRIC PERSON AUTHENTICATION USING PEN SIGNATURE TRAJECTORIES,” 9th
International Conference on Neural Information Processing (ICONIP), Singapore, Nov., 2002.
国際会議[17]
Takashi
Kaburagi, Daigo Muramatsu, Shinichiro Hashimoto, Masahiro Sasaki,
Takashi Matsumoto, “Transmembrane Region Prediction with Hydropathy
Index/Charge Two-Dimensional Trajectories of Stochastic Dynamical Systems,”
The Second Asia Pacific Bioinformatics Conference (APBC), Dunedin, New
Zealand, Jan., 2004.
国際会議[18]
Daigo Muramatsu, Shinichiro
Hashimoto, Takahide Tsunashima, Takashi Kaburagi, Masahiro Sasaki,
Takashi Matsumoto, “Inferring Transmembrane Region Counts with Hydropathy
Index/Charge Two Dimensional Trajectories of Stochastic Dynamical Systems,”
Proceedings of 2003 IEEE International Workshop on Neural Networks for Signal
Processing (NNSP), pp.101−110, Toulouse, France, Sep., 2003.
国際会議[19]
Khayrollah Hadidi, Hiroyuki
Oshima, Masahiro Sasaki, Takashi Matsumoto, “A Highly Linear Fully
Differential Low Power CMOS Line Driver,” Proceedings of 29th European
Solid-State Circuits Conference (ESSCIRC), pp.541−544, Estoril, Portugal,
Sep., 2003
Mitsuru Kondo, Daigo Muramatsu,
Masahiro Sasaki, Takashi Matsumoto, “NONLINEAR SEPARATION OF SIGNATURE
TRAJECTORIES FOR ON-LINE PERSONAL AUTHENTICATION,” Proceedings of the 2003
IEEE International Conference on Multimedia & Expo, pp.89−92, Baltimore,
Maryland, U.S.A., Jul., 2003
国際会議[22]
Mitsuru Kondo, Daigo
Muramatsu, Masahiro Sasaki, Takashi Matsumoto, “Bayesian MCMC for
Biometric Person Authentication Incorporating On-Line Signature
Trajectories,” Proceedings of the IASTED International Conference on SIGNAL PROCESSING,
PATTERN RECOGNITION, AND APPLICATIONS, pp.269−273, Rhodes, Greece, Jun. and
Jul., 2003
国際会議[23]
Mitsuru Kondo, Daigo
Muramatsu, Masahiro Sasaki, Takashi Matsumoto, “A Bayesian MCMC
On-line Signature Verification,” Proceedings of the 4th International
Conference on AUDIO- and VIDEO-BASED BIOMETRIC PERSON AUTHENTICATION (AVBPA),
pp.540−548, Guildford, U.K., Jun., 2003
国際会議[24]
Mitsuru Kondo, Daigo
Muramatsu, Masahiro Sasaki, Takashi Matsumoto, “NONLINEAR SEPARATION
OF SIGNATURE TRAJECTORIES FOR ON-LINE PERSONAL AUTHENTICATION,” 2003 IEEE
International Conference on Acoustics, Speech, and Signal Processing
(ICASSP), V. II, pp.349-352, Hong Kong, Apr., 2003.
国際会議[25]
Mitsuru Kondo, Daisuke Sakamoto, Masahiro
Sasaki, Takashi Matsumoto, “A NEW ONLINE SIGNATURE VERIFICATION ALGORITHM
INCORPORATING PEN VELOCITY TRAJECTORIES,” Proceedings of the 2002 IEEE
International Symposium on Intelligent Signal Processing and Communication
Systems (ISPACS), Kaohsiung, Taiwan, Nov., 2002
国際会議[26]
Hiroshi Kawatsu, Masahiro
Sasaki, Takeyasu Sakai, Takashi Matsumoto, “CMOS Analog Matched Filter
Using Sample-and-Hold Circuit,” Proceedings of the 2002 IEEJ International
Analog VLSI Workshop, pp.160−164, Singapore, Sep., 2002.
国際会議[27]
Mitsuru Kondo, Daisuke Sakamoto, Masahiro Sasaki,
Takashi Matsumoto, “On line Signature Verifier Incorporating Position,
Pressure, Inclination and Velocity Trajectories,” Proceedings of the 2002
International Conference on Security and Management (SAM'02), Las Vegas, NV,
Jun., 2002.
国際会議[28]
Khayrollah Hadidi, Masahiro Sasaki,
Tadatoshi Watanabe, Daigo Muramatsu, Takashi Matsumoto, “An Open-Loop Full
CMOS 103MHz -61dB THD S/H Circuit”, Proceedings of the IEEE 1998 Custom
Integrated Circuits Conference (CICC), pp.381−383, Santa Clara, California,
May, 1998.
ワークショップ
(査読付)[1]
Khayrollah Hadidi、大島宗之、佐々木昌浩、松本隆、“2.5V CMOS Fully
Differential Low Power High Linearity Analog Line-Driver、” 第16回回路とシステム(軽井沢)ワークショップ論文集、pp.67−72、2003年4月
Best Paper Award, “A 0.18-μm CMOS Shock Wave
Generator with an On-chip Antenna and a Digitally Programmable Delay
Circuit,” Nguyen Ngoc Mai Khanh, Masahiro Sasaki, Kunihiro Asada,
Taihei Monma, Second Asia Symposium on Quality Electronic Design (ASQED), Aug.,
2010.
受賞[2]
(研究費[2])
第8回 LSI
IP デザイン・アワード研究助成賞、“低電圧動作オンチップ・マトリックスアレイ高精度温度計測・管理システムの構築、” 研究助成金 10万円、佐々木昌浩、池田誠、浅田邦博、LSI
IP デザイン・アワード運営委員会、2006年