D2の朱がIEEE Asian Solid-State Circuits Conference 2025で発表を行いました（2025/11/5）

発表タイトル：
A 2.6GHz Inductorless PLL with Configurable-Duty-Cycle Ring Oscillator and Zero-ISF Subsampling Phase Detector Achiving −70dBc Reference Spur and 186fs RMS Jitter